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	<title>PicoCraft</title>
	<link>http://picocraft.com/wp</link>
	<description>PicoCraft: the Technology Leader in SOC Clock Analysis</description>
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	<item>
		<title>STA Based IP Block Timing Extraction</title>
		<description>[January 2015] PicoCraft delivered STA services to Timing Capture parameters necessary for IP Block Timing Extractions in system level. IP Blocks were  in 16nm and 20nm technologies. </description>
		<link>http://picocraft.com/wp/?p=270</link>
			</item>
	<item>
		<title>16nm IP Block Implementation</title>
		<description>[July 2014] PicoCraft completed Physical Design and Timing Verification for 16 nm IP Blocks in DSP application. </description>
		<link>http://picocraft.com/wp/?p=265</link>
			</item>
	<item>
		<title>20nm IP Block Signoff</title>
		<description>[December 2013] PicoCraft delivered timing signoff for 20 nm communication IP block designs. </description>
		<link>http://picocraft.com/wp/?p=261</link>
			</item>
	<item>
		<title>Full Chip Synthesis Consulting Service</title>
		<description>[April 2013] PicoCraft completed design service of Full chip and block logic and DFT Synthesis for communication chip designs. </description>
		<link>http://picocraft.com/wp/?p=258</link>
			</item>
	<item>
		<title>IP Timing Characterization Flow</title>
		<description>[May 2012] PicoCraft  developed and delivered STA based full timing characterization flow for processor IP block to support proprietary application system. </description>
		<link>http://picocraft.com/wp/?p=248</link>
			</item>
	<item>
		<title>Full Chip SoC Timing Signoff Flow</title>
		<description>[September 2011] PicoCraft delivered an automated full chip SoC Timing Signoff Flow supporting multiple IPs with separate Library implementations. Flow was developed in Goldtime STA tool. </description>
		<link>http://picocraft.com/wp/?p=242</link>
			</item>
	<item>
		<title>28nm IP Block Implementation</title>
		<description>[December 2010] PicoCraft delivered Timing Sign-off and Multi-Scenario ECO flow for 28nm IP designs.  Established a consistent Timing Closure methodology for all IP blocks. </description>
		<link>http://picocraft.com/wp/?p=233</link>
			</item>
	<item>
		<title>FrontEnd Chip Implementation</title>
		<description>[July 2010] PicoCraft delivered Front-end Synthesis flow, DFT Implementation and STA signoff flow for 45nm communication chip designs. </description>
		<link>http://picocraft.com/wp/?p=225</link>
			</item>
	<item>
		<title>45nm Timing Constraints and Signoff</title>
		<description>[August 2009] PicoCraft completed Timing Constraints and STA Signoff for 45nm SOC in consumer product design. </description>
		<link>http://picocraft.com/wp/?p=219</link>
			</item>
	<item>
		<title>Timing Bring-up and CDC Analysis</title>
		<description>[January 2009] PicoCraft provided Timing bring-up and automation support for 65nm and 45nm SOC product bring-up. PicoCraft provided the Clock Domain Crossing (CDC) analysis of large scale SOC design. </description>
		<link>http://picocraft.com/wp/?p=181</link>
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