January 31st, 2015
Administrator
[January 2015] PicoCraft delivered STA services to Timing Capture parameters necessary for IP Block Timing Extractions in system level. IP Blocks were in 16nm and 20nm technologies.
July 1st, 2014
Administrator
[July 2014] PicoCraft completed Physical Design and Timing Verification for 16 nm IP Blocks in DSP application.
December 30th, 2013
Administrator
[December 2013] PicoCraft delivered timing signoff for 20 nm communication IP block designs.
April 30th, 2013
Administrator
[April 2013] PicoCraft completed design service of Full chip and block logic and DFT Synthesis for communication chip designs.
May 30th, 2012
Administrator
[May 2012] PicoCraft developed and delivered STA based full timing characterization flow for processor IP block to support proprietary application system.
September 30th, 2011
Administrator
[September 2011] PicoCraft delivered an automated full chip SoC Timing Signoff Flow supporting multiple IPs with separate Library implementations. Flow was developed in Goldtime STA tool.
December 30th, 2010
Administrator
[December 2010] PicoCraft delivered Timing Sign-off and Multi-Scenario ECO flow for 28nm IP designs. Established a consistent Timing Closure methodology for all IP blocks.
July 30th, 2010
Administrator
[July 2010] PicoCraft delivered Front-end Synthesis flow, DFT Implementation and STA signoff flow for 45nm communication chip designs.
August 30th, 2009
Administrator
[August 2009] PicoCraft completed Timing Constraints and STA Signoff for 45nm SOC in consumer product design.
January 31st, 2009
Administrator
[January 2009] PicoCraft provided Timing bring-up and automation support for 65nm and 45nm SOC product bring-up. PicoCraft provided the Clock Domain Crossing (CDC) analysis of large scale SOC design.
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